Selected publications
- WCET-Driven, Code-Size Critical Procedure Cloning (PDF, 410kB)
By Paul Lokuciejewski, Heiko Falk, and Peter Marwedel, TU Dortmund, and Henrik Theiling, AbsInt.
In: The 11th International Workshop on Software and Compilers for Embedded Systems (SCOPES) 2008. - WCET-Driven Cache-Based Procedure Positioning Optimizations (PDF, 230kB)
By Paul Lokuciejewski, Heiko Falk, and Peter Marwedel, TU Dortmund.
In: The 20th Euromicro Conference on Real-Time Systems (ECRTS) 2008. - A Retargetable Framework for Multi-Objective WCET-Aware High-Level Compiler Optimization (PDF, 100kB)
By Sascha Plazar, Paul Lokuciejewski, and Peter Marwedel, TU Dortmund.
In: The 29th IEEE Real-Time Systems Symposium (RTSS) WiP 2008. - A Fast and Precise Static Loop Analysis Based on Abstract Interpretation, Program Slicing, and Polytope Model
By Paul Lokuciejewski, Daniel Cordes, Heiko Falk, and Peter Marwedel, TU Dortmund.
In: Code Generation and Optimization (CGO) 2009. - Automatic WCET Reduction by Machine Learning Based Heuristics for Function Inlining
By Paul Lokuciejewski, Fatih Gedikli, Peter Marwedel, and Katharina Morik, TU Dortmund.
In: The 3rd Workshop on Statistical and Machine Learning Approaches to Architectures and Compilation (SMART) 2009. - A Constraint Programming Approach for Allocation and Scheduling on the CELL Broadband Engine (PDF, 270kB)
By Luca Benini, Michele Lombardi, Michela Milano, and Martino Ruggiero, University of Bologna.
In: CP 2008. - Multi-Stage Benders Decomposition for Optimizing Multicore Architectures
By Luca Benini, Michele Lombardi, Michela Milano, Martino Ruggiero, and Marco Mantovani, University of Bologna.
In: CPAIOR 2008. - Resource-Management Policy Handling Multiple Use Cases in MPSoC Platforms Using Constraint Programming
By Luca Benini, Davide Bertozzi, and Michela Milano, University of Bologna.
In: ICLP 2008. - Cellflow: a Parallel Application Development Environment with Run-Time Support for the Cell BE Processor (PDF, 380kB)
By Martino Ruggiero, Michele Lombardi, Michela Milano, and Luca Benini, University of Bologna.
In: 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools (DSD) 2008. - A Framework for Designing Embedded Real-Time Controllers
By Yifan Wu, Enrico Bini, and Giorgio Buttazzo, Scuola Superiore Sant’Anna.
In: RCTSA 2008. - Parametric Timing Analysis for Complex Architectures
By Sebastian Altmeyer, Björn Lisper, and Reinhard Wilhelm, Saarland University, and Christian Hümbert, AbsInt.
In: Proceedings of the 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA) 2008. - CAMA: Cache-Aware Memory Allocation for WCET Analysis
By Jörg Herter, Jan Reineke, and Reinhard Wilhelm, Saarland University.
In: Proceedings Work-In-Progress Session of the 20th Euromicro Conference on Real-Time Systems. - WCET Analysis for Preemptive Systems
By Sebastian Altmeyer and Gernot Gebhard, Saarland University.
In: Proceedings of the 8th International Workshop on Worst-Case Execution Time (WCET) Analysis. - Estimating the Performance of Cache Replacement Policies
By Daniel Grund and Jan Reineke, Saarland University.
In: MEMOCODE 2008: Proceedings of the 6th IEEE/ACM International Conference on Formal Methods and Models for Code Design. - Relative Competitiveness of Cache Replacement Policies
By Jan Reineke and Daniel Grund, Saarland University.
In: SIGMETRICS 2008: Proceedings of the 2008 ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems. - Relative Competitive Analysis of Cache Replacement Policies
By Jan Reineke and Daniel Grund, Saarland University.
In: LCTES 2008: Proceedings of the 2008 ACM SIGPLAN–SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems. - Abstract Interpretation with Applications to Timing Validation (PDF, 180kB)
By Reinhard Wilhelm and Björn Wachter, Saarland University.
In: CAV 2008: Proceedings of the 20th International Conference on Computer Aided Verification.
More publications coming soon.